1/4 rev. a structure silicon monolithic integrated circuit function synchronous rectifier step-down dc-dc converter product bu9006guz function - input voltage range 2.5v ~ 4.5v - output voltage range 0.95 v ~ 4.5v(ref input voltage range 0.5v~vin) - current mode control - integrated output fet synchronous rectifier step-down dc-dc converter - switching frequency 2.0mhz typ. - maximum output current 750ma (switching regulator part) - maximum output current 1200ma (bypass switch part) - pchfet on resistance at bypass mode: (70mohm) typ. - 1.6mm x 1.6mm, t= 0.4mm max, wlcsp absolute maximum rating (ta=25c) item symbol rating unit maximum input power supply voltage vin 7 v power dissipation pd 0.48(*1) w operating temperature range topr -35 ~ +85 c storage temperature range tstg -55 ~ +125 c junction temperature tjmax +125 c (*1) when mounted on the specified pcb (50 mm x 58 mm ). deducted by 4.8m w/c when used over ta=25c. operating range (ta=25c) item symbol rating unit condit ion min. typ. max. power supply voltage vin 2.5 - 4.5 v downloaded from: http:///
2/4 rev. a electrical characteristics (unless otherwise specified in=3.6[v], ta=25[c]) item symbol rating unit condition min. typ. max. [switching regulator part] output voltage 1 vout1 1.15 1.20 1.25 v refin=0.60 v output voltage 2 vout2 1.45 1.50 1.55 v refin=0.75 v [soft start part] soft start time tss - 40 70 usec [oscillator circuit] switching frequency fosc 1.5 2.0 2.5 mhz [driver part] pchfet on resistance ronp - 300 500 m ? nchfet on resistance ronn - 250 450 m ? [bypass switch part] on resistance rbyp - 70 120 m ? [error amp part] ref input bias current iampin - 0 500 na [control pin part] shdn pin pull down resistor rshdn 0.5 1 2 m ? shdn pin control voltage operation vshdnh 1.4 - vin v non operation vshdnl 0 - 0.4 v hp pin pull down resistor rhp 0.5 1 2 m ? hp pin control voltage operation vhph 1.4 - vin v non operation vhpl 0 - 0.4 v uvlo release voltage threshold uvth 1.95 2.2 2.45 v hysteresis uvhy 70 90 110 mv [circuit current] circuit current at shutdown iin - 0 10 ua shdn=0v * no design for durability against radiation downloaded from: http:///
3/4 rev. a x + + + a + block diagram external dimention/pin layout pin number/name/function pin nr name function a1 gnd gnd pin a2 hp bypass switch on pin a3 ref reference voltage input pin b1 lx inductor connection pin b2 shdn shutdown pin b3 in power supply input pin c1 in c2 out output pin c3 out pin layout (top view) 123 gnd hp ref lx shdn in in out out a b c 9 6 o downloaded from: http:///
4/4 rev. a operation notes 1) absolute maximum ratings an excess in the absolute maximum rating, such as supply vol tage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify brea king mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) gnd voltage the potential of gnd pin must be minimum potential in all condition. as an ex ception, the circuit design allows voltages up to -0.3 v to be applied to the ic pin. 3) thermal design use a thermal design that allows for a sufficient margin in li ght of the power dissipation (pd) in actual operating conditions. 4) inter-pin shorts and mounting errors use caution when positioning the ic for mounting on printed ci rcuit boards. the ic may be damaged if there is any connection error or if pins are shorted together. 5) actions in strong electromagnetic field use caution when using the ic in the pres ence of a strong electromagne tic field as doing so may ca use the ic to malfunction. 6) mutual impedance power supply and ground wiring should reflect consideration of the need to lower mutual impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 7) thermal shutdown circuit (tsd circuit) this model ic has a built-in tsd circuit. this circuit is onl y to cut off the ic from thermal runaway, and has not been design to protect or guarantee the ic. therefore, the user should not plan to activate this circuit with continued operation in mind. 8) regarding input pin of the ic this monolithic ic contains p+ isolation and p substrate layers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of these p layers with the n layers of other elem ents, creating a parasitic diode or transistor. for example, as shown in the figures be low, the relation between each potential is as follows: when gnd > pin a and gnd > pin b, the p-n junction operates as a parasitic diode. when gnd > pin b, the p-n junction ope rates as a parasi tic transistor. parasitic diodes can occur inevitable in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, opera tional faults, or physical damage. accordingly, met hods by which parasitic diodes operate, such as applying a voltage that is lower than the gnd (p substrate) vol tage to an input pin, should not be used . 9) mounting condition as mounting condition to the substrate ma y cause the affect to the electrical character of ic. the design margin for the shift value as mount is required, considering the ev aluation result for ic to mount the substrate you will use. 10) external components the ic evaluation with the external co mponents you will use is re quired to check the margin within all operating condition. because some external inductors and capacitors change its character drastically depending on the dc current, dc voltage, temperature, and so on. downloaded from: http:///
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